Realizing Gate-All-Around Vertical Nanowire Field-Effect Transistors Based on Van Der Waals Epitaxial InAs-on-2D Heterostructures

A. Abrand, N.H. Manimaran, P.K. Mohseni, K. Xu
Rochester Institute of Technology,
United States

Keywords: 2D materials, electric double layer, nanoelectronics, field-effect transistor, iontronics, gate-all-around transistors, nanowires


III-V semiconductors show promise as channel materials in next generation nanoelectronics.1,2 Among III-V materials, InAs stands out as a potential replacement for n-type channel material in complimentary metal-oxide-semiconductor (CMOS) based devices.3,4 Compared with silicon, InAs offers 30 times the electron mobility and a higher ON current, and when grown as a 1D InAs nanowire (NW), this mobility is further enhanced compared to thin-film and bulk InAs.3 As such, NW FETs were developed to harness the potential of III-V materials, where a gate-all-around (GAA) geometry offers better electrostatic gating of NWs but proves to be a much more difficult fabrication process, especially with vertical NWs.3 In order to solve this issue, electric double layer (EDL) gating can be used. EDL gating is a method which uses an electric field to control mobile ions within an electrolyte to create strong local electric fields. Due to the accumulation of ions in the electrolyte ~1 nm from the channel, fields on the order of 10 MV/cm can be achieved, allowing for high carrier density in semiconducting materials (including 2D and III-V materials)5. Additionally, the strength of EDL gating is weakly dependent on gate to channel distance, which allows for flexibility in device geometry without sacrificing carrier density. EDL gating can support otherwise difficult to fabricate geometries such as vertical GAA NW FETs. In this study, we will investigate the challenges that come with fabricating these novel devices, discuss electrical characterization of first-generation devices, and propose improvements for new generations. The device geometry consists of dense vertical InAs NW fields epitaxially grown on graphene, with solid electrolyte permeating between NWs, topped with a metal electrode contacting the top of the NWs. Characterization of the fabrication process and its impact on the integrity of the NW will be performed on via AFM, RAMAN, and SEM analysis.