Carbon Nanotubes to Enable 1000x Reduction in Data Center Computing

J. Provine
Aligned Carbon,
United States

Keywords: carbon nanotubes, 3D monolithic integration, CNFET, semiconductors


The energy consumption world-wide by data centers is currently a few percent. It is poised to rise faster than nearly every other sector and in some predictions will exceed 25% of the world energy budget within the next two decades. This is happening at the same time that the demand for computing capability, particularly data intensive computation like machine learning and artificial intelligence has never been higher or growing at a faster rate. Data center optimization efforts have compensated for the growth in computation for roughly the last decade, but these methods are nearing theoretical limits currently. For many decades, the integrated circuits industry benefited from the simultaneous increase in speed and reduction in energy per operation that came from scaling devices to smaller size dimensions. This is no longer possible, so where will the orders of magnitude improvement in energy efficiency and speed come from going forward. The computation demands for future abundant data applications will far exceed the capabilities of today’s systems because silicon integrated circuit scaling has hit fundamental limits in power as well as architectural limits in memory access time. Heterogenous integration of various types are becoming commercially available, but the industry's roadmap for future computing targets monolithic 3D integration to achieve ultimate performance in data intensive computation. Carbon nanotubes (CNTs) have interest as the semiconducting material for transistor channels which can be integrated monolithically on existing silicon circuitry. They do not have the same thermal budget limitations of silicon or III-V semiconductor fabrication processes. Key to this development is high volume compatible manufacturing of CNTs that are both aligned and purified to select only the semiconducting CNTs. This combination has proved elusive to date. Aligned Carbon will report on their development of a scalable purification process which can preserve the alignment of CNT arrays through the selective removal of metallic CNTs. Purity is validated from the performance of large suites of CNT field effect transistors (CNFETs) each containing several aligned CNTs. Additionally, aligned CNT synthesis and CNT integration in to wafer fabrication processes will be discussed.