M. Arnold
University of Wisconsin,
United States
Summary:
Semiconductors are materials with electrical conductivity that can be switched on and off, that have allowed for nearly all electronics. However, most semiconductor devices utilize silicon, a microelectronics technology more half a century old. Silicon is now being extended to its limit and cannot meet the needs of next-generation devices. Carbon nanotubes are nanoscale semiconducting wires that conduct more electricity per area than silicon and more rapidly switch between on and off states with less voltage, making them ideal for next-generation fast, low-energy logic and high-speed, linear RF devices. However, no one has yet been able create a process for employing nanotubes commercially. In raw form, nanotubes are disordered and tangled and thus do not conduct electricity well. For nanotubes to be most useful, they must be lined up in the same direction in a single layer so that electricity can rapidly and efficiently travel through them. This has been a long-standing roadblock. This talk will present recent discoveries at the University of Wisconsin on (1) purifying and aligning semiconducting nanotubes into massively parallel arrays and (2) the research and development of semiconducting carbon nanotubes for logic and radio frequency technologies. We have pioneered nanotube array fabrication technologies that enable the (a) partial alignment of nanotubes (±30˚) via shear (demonstrated 100 mm wafer-scale); (b) finer alignment (±6˚) at liquid-liquid interfaces (demonstrated 100 mm size-scale); and, (c) the selected-area deposition of nanotube arrays (±7˚) in lithographically-defined patterns combining topographical and chemical features (demonstrated 25 mm size-scale). Most recently, we have discovered a powerful new mechanism for driving the self-assembly of nanotubes into aligned arrays, by coaxing them to form two-dimensional liquid-crystals. We have uncovered that when nanotubes are segregated to liquid-liquid interfaces, mesogenic interactions cause them to self-align (within +/-5.7 degrees so far) and self-assemble into dense arrays (> 100 per micron) like those needed for microelectronics. The assembled nanotubes are easily integrated on silicon substrates at room-temperature and integrated into high-performance devices. APL (2014); ACS Nano (2014); Science Advances (2016); Langmuir (2017); Adv Elect Materials (2019); Science Advances (2021); Nanoscale Advances (2021); JAP (2022). Highlights by Bloomberg News https://youtu.be/VsUF_CBJq50 (2022); US Patent 10,873,026; US Patent 10,074,819; US Patent 9,673,399.