Cryo-CMOS Modeling for Quantum Computing Applications

Lan Wei

Assistant Professor

University of Waterloo

Professor Lan Wei received her B.S. in Microelectronics and Economics from Peking University, Beijing, China in 2005 and M.S. and Ph.D. in Electrical Engineering from Stanford University, Stanford, USA (with Professor H.–S. Philip Wong) in 2007 and 2010, respectively. Before joining University of Waterloo in 2014, she worked at Altera Corproation in San Jose, California, where her responsibilities included foundary technology evaluation, power management and Stratix X FPGA product development with Intel 14nm technology. She also worked as a post-doctoral associate in Microsystems Technology Laboratories, Massachusetts Institute of Technology under Professor Dimitri Antoniadis. Her research focuses on device-circuit interactive design and optimization, integrated nanoelectronic systems with low-dimensional materials, as well as GaN-based technology.

 

Wei has served on the Technical Program Committee of IEDM (2011-2012), ISLPED (2013), VSLI-TSA (2013), CCECE (2014), IEEE-NANO (2014), and was listed as one of the key contributors to the PIDS (Process Integration, Devices, and Structures) Chapter of ITRS (International Technology Roadmap for Semiconductors) 2009 Edition.

Research Interests

Education

Selected/Recent Publications