X. He, G. Hu, C. Li, Y. He, J. Liu, G. Ma, J. He, J. Pan
SoC Key Laboratory, Peking University Shenzhen Institute and PKU-HKUST Shenzhen-Hong Kong Institution,
Keywords: integrated circuits, semiconductor devices, field effect transistor, tunneling FET, FinFET, hot carrier effect, oxide reliability, interfacial traps
Summary:Hot-carrier effect and oxide reliability of CMOS T-FinFET with 2.1nm-thick gate-SiO2 were investigated. It was found that hot-carrier immunity improves as the T-FinFET fin width (body thickness) decreases, which facilitates gate-length scaling, while it is degraded at elevated temperature due to the self-heating effect. High values of QBD are achieved for devices with very small gate area. A post-fin-etch hydrogen anneal is helpful for improving hot-carrier immunity and QBD.