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Carbon Nanotubes and Nano Structures for Applicati on in Interconnects, Sensors and Wafer Level Packaging

S. Schulz
Fraunhofer Institute for Electronic Nano Systems, Chemnitz, DE

Keywords: CNT, Interconnects, Sensors, Packaging


Selected topics of nanotechnology R&D at Fraunhofer ENAS will be introduced. In the field of nanoelectronics the application of Carbon Nanotubes (CNTs) to on-chip via interconnects will be introduced. We achieved vertical and aligned CVD growth of CNTs at low temperatures. Results of CNT quality will be discussed as well as an integration approach using selective CNT growth. Concepts of using composite material consisting of CNTs and dielectric or metal for via fill will be discussed. Furthermore, we will give an overview of the status of placement of CNTs between electrodes by using dielectrophoresis for sensor and transistor applications. This approach combines room temperature CNT placement in devices along with the ability to use preselected, high-quality CNTs for integration. We will introduce a concept for wafer-level integration of this technique using microfluidic device. In order to make use of nano effects in MEMS packaging, nano scaled intermediate layers and layer systems are investigated. The aim of this work is to achieve permanent and hermetically sealed joints between two wafers, using the lowest temperature impact on the system. Different techniques will be introduced including (1) PLD and PVD technologies, where different nano layers and multi layer systems could be deposited on large and mainly planar areas, (2) aerosol jet technology enabling the selective printing of metallic nano particles or dielectric inks onto certain substrates and topographic surfaces, and (3) nano imprint lithography realized by imprinting and UV or thermal curing.
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