Virtual Failure Analysis of Electronic Components based on Accelerated Reliability Tests
New method for determining reliability vs. performance for electronic components, able to separately analyze different failure mechanisms. Based on accelerated lifetime tests, we are able to monitor both the characteristic of a failure as well as the device performance degradation. Devices can then be optimized for particular performance/reliability tradeoff.
Single Event Upset Suppression System (SEUSS)
Single Event Suppression System (SEUSS) cells are designed to be immune to Single Event Upsets (SEU). SEUSS can be configured as two different kinds of SEU-tolerant SR latches. One SEUSS cell emulates a cross-coupled NOR gate SR flip-flop (SEUSSNor). The other one emulates a cross-coupled NAND gate SR flip-flop (SEUSSNand).
High-Speed Pattern Recognition System Using 3-D Integrated Circuits
Fermilab has developed scalable systems where highly flexible, non-blocking, high bandwidth board to board communication is combined with real-time high-speed pattern recognition. Developed for analyzing millions of particle collisions per second, the technology has applications in data mining, gene sequencing, stock market tracking, etc.
"Quilt Packaging" Microchip Interconnect Technology
Quilt Packaging (QP) is a direct edge-interconnect technology that enables on-chip like performance between chips made from different processes or materials. QP has demonstrated sub-micron alignment accuracy and demonstrated chip-to-chip insertion loss of less than 1dB across the entire bandwidth from DC to 220 GHz.
NASA Armstrongâ€™s Fiber Optic Sensing System (FOSS)
NASA Armstrong Flight Research Centerâ€™s lightweight, robust fiber optic sensing system (FOSS) represents a major breakthrough in high-speed operational monitoring and sensing technology. The sensing system can be used to determine a variety of critical parameters including strain, shape deformation, temperature, liquid level, strength, and operational loads in real-time.
Nanoscale Offset Printing System (NanoOPS)
The Nanoscale offset printing system (NanoOPS) performs multi-scale nanomanufacturing processes to print multilayered heterogeneous nanomaterials onto various substrates. The fully automated cluster tool has five modules for the assembly, transfer, registration and alignment. It uses Damascene templates to print patterns for applications such as electronics, sensors, energy, medical devices.
Synchronous DC-DC Buck Converter Using 2-step Delay Locked Loop (DLL), and Compensation Method of Propagation Delay Time
This DC-DC buck converter which allows an inductor-less and capacitor-less state, the efficiency is considerably reduced by a propagation-delay problem due to a high frequency.This technology is to compensate the propagation delay using a 2-step delay locked loop(DLL) and thus to design the high efficiency DC-DC buck converter.
Multi-Source Multi-Scale Counting in Extremely Dense Crowd Images
A software algorithm that produces nearly accurate crowd counts from video or still images containing an average of 1,280 people per frame. The algorithm functions with new constraints in multi-scale Markov random field to infer a single count over the entire image.
A Secure RFID System for Product Anti-Counterfeiting
A secure RFID system, which is enabled with the patent-pending lightweight stream cipher WG-8 plus a suite of security protocols for authentication and privacy enhancement in supply chain. It is a cost-effective, secure EPC C1 Gen2 RFID tags integrate embedded security features which are difficult to break RFID tags.
© Copyright 2015 TechConnect