BSIMIMG: Compact Model for UTBBSOI MOSFETs

Y.S. Chauhan, P. Kushwaha, S. Khandelwal, C. Yadav, N. Paydavosi, J.P. Duarte, C. Hu
IIT Kanpur, IN

Keywords: BSIM-IMG, Comptact Model, SOI MOSFET, SPICE

Summary:

Fully depleted SOI technology in the form of Ultra-Thin Body and Box (UTBB) MOSFET is already under production for 28nm technology node and beyond. Threshold voltage tuning via back-biasing to achieve multi-threshold transistors on same wafer is a distinguished characteristic of UTBB transistors. BSIMIMG, a surface potential based compact model for thin-body devices has recently gone through several enhancements especially back-place depletion effect. In this paper, recent progress and scaling evaluation of the BSIMIMG model on devices from Leap’s 50nm node are presented. BSIMIMG model shows excellent agreement with the experimental data and successfully passes all benchmark tests such as AC/DC symmetry tests.