An Analytic Potential Based Model for Gate-All-Around Nanowire Tunnel-FETs

Y. Liu, J. He, M. Chan
Peking University Shenzhen SOC Key Laboratory, CN

Keywords: gate-all-around (GAA), nanowire tunnel-FETs (NW-TFETs), band to band tunneling (BTBT), analytic model


In this paper, an analytic potential based current model of the gate-all-around (GAA) silicon nanowire tunnel-FETs (NW-TFETs) is proposed based on the surface potential solutions at the channel direction and considering band to band tunneling (BTBT) efficiency. The 3-D Poisson’s equation is solved to obtain the surface potential distribution in the partition regions along the channel direction for NW-TFET device and then a tunneling current model using Kane’s expression is developed. The validity of the developed model is proved by the good agreement between the model predictions and TCAD simulation results.